A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications

Hee-Tae Ahn, David J. Allstot. A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications. J. Solid-State Circuits, 35(3):450-454, 2000. [doi]

@article{AhnA00,
  title = {A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications},
  author = {Hee-Tae Ahn and David J. Allstot},
  year = {2000},
  doi = {10.1109/4.826829},
  url = {https://doi.org/10.1109/4.826829},
  researchr = {https://researchr.org/publication/AhnA00},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {35},
  number = {3},
  pages = {450-454},
}