Post-Silicon Clock-nvert (PSCI) for reducing process-variation induced skew in buffered clock networks

Charbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi. Post-Silicon Clock-nvert (PSCI) for reducing process-variation induced skew in buffered clock networks. In 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA. pages 794-798, IEEE, 2009. [doi]

Abstract

Abstract is missing.