Md Mahbub Alam, Mark Tehranipoor, Domenic Forte. Recycled FPGA Detection Using Exhaustive LUT Path Delay Characterization and Voltage Scaling. IEEE Trans. VLSI Syst., 27(12):2897-2910, 2019. [doi]
@article{AlamTF19,
title = {Recycled FPGA Detection Using Exhaustive LUT Path Delay Characterization and Voltage Scaling},
author = {Md Mahbub Alam and Mark Tehranipoor and Domenic Forte},
year = {2019},
doi = {10.1109/TVLSI.2019.2933278},
url = {https://doi.org/10.1109/TVLSI.2019.2933278},
researchr = {https://researchr.org/publication/AlamTF19},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {27},
number = {12},
pages = {2897-2910},
}