Khitam M. Alatoun, Ranga Vemuri. Efficient Method for Timing-based Information Flow Verification in Hardware Designs. In Ioannis Savidis, Avesta Sasan, Himanshu Thapliyal, Ronald F. DeMara, editors, GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6 - 8, 2022. pages 159-163, ACM, 2022. [doi]
Abstract is missing.