Pablo González de Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sánchez Espeso. Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification. IEEE Trans. on CAD of Integrated Circuits and Systems, 36(3):475-488, 2017. [doi]
@article{AledoPWDS17,
title = {Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification},
author = {Pablo González de Aledo and Nils Przigoda and Robert Wille and Rolf Drechsler and Pablo Sánchez Espeso},
year = {2017},
doi = {10.1109/TCAD.2016.2611494},
url = {http://dx.doi.org/10.1109/TCAD.2016.2611494},
researchr = {https://researchr.org/publication/AledoPWDS17},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {36},
number = {3},
pages = {475-488},
}