A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers

Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija. A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers. In Vassilis Paliouras, Johan Vounckx, Diederik Verkest, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Volume 3728 of Lecture Notes in Computer Science, pages 724-732, Springer, 2005. [doi]

@inproceedings{AleksicNCO05,
  title = {A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers},
  author = {Marko Aleksic and Nikola Nedovic and K. Wayne Current and Vojin G. Oklobdzija},
  year = {2005},
  doi = {10.1007/11556930_74},
  url = {http://dx.doi.org/10.1007/11556930_74},
  tags = {logic},
  researchr = {https://researchr.org/publication/AleksicNCO05},
  cites = {0},
  citedby = {0},
  pages = {724-732},
  booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings},
  editor = {Vassilis Paliouras and Johan Vounckx and Diederik Verkest},
  volume = {3728},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-29013-3},
}