Throughput and Efficiency Analysis of Unrolled Hardware Architectures for the SHA-512 Hash Algorithm - researchr publication authors

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Ignacio Algredo-Badillo, Miguel Morales-Sandoval, Claudia Feregrino Uribe, René Cumplido. Throughput and Efficiency Analysis of Unrolled Hardware Architectures for the SHA-512 Hash Algorithm. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012, Amherst, MA, USA, August 19-21, 2012. pages 63-68, IEEE, 2012. [doi]

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