A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration - researchr publication related

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Ahmed M. A. Ali, Huseyin Dinc, Paritosh Bhoraskar, Christopher Dillon, Scott Puckett, Bryce Gray, Carroll Speir, Jonathan Lanford, Janet Brunsilius, Peter R. Derounian, Brad Jeffries, Ushma Mehta, Matthew McShea, Russell Stop. A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration. J. Solid-State Circuits, 49(12):2857-2867, 2014. [doi]

The following publications are possibly variants of this publication:

A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background CalibrationAhmed M. A. Ali, Andrew Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Paritosh Bhoraskar, Huseyin Dinc, Mike Hensley, Russell Stop, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed. jssc, 45(12):2602-2612, 2010. [doi]

29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibrationAhmed M. Abdelatty Ali, Hüseyin Dinc, Paritosh Bhoraskar, Christopher Dillon, Scott Puckett, Bryce Gray, Carroll Speir, Jonathan Lanford, David Jarman, Janet Brunsilius, Peter R. Derounian, Brad Jeffries, Ushma Mehta, Matthew McShea, Ho-Young Lee. isscc 2014: 482-483 [doi]

A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background CalibrationAhmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Bardsley, Christopher Dillon, Matthew McShea, Joel Prabhakar, Scott Puckett. jssc, 55(12):3210-3224, 2020. [doi]

A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and ditherAhmed M. A. Ali, Huseyin Dinc, Paritosh Bhoraskar, Scott Puckett, Andy Morgan, Ning Zhu, Qicheng Yu, Christopher Dillon, Bryce Gray, Jonathan Lanford, Matthew McShea, Ushma Mehta, Scott Bardsley, Peter R. Derounian, Ryan Bunch, Ralph Moore, Gerry Taylor. vlsic 2016: 1-2 [doi]

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