Naushad Ali, Bharat Garg. New Energy Efficient Reconfigurable FIR Filter Architecture and Its VLSI Implementation. In Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh, editors, VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers. Volume 711 of Communications in Computer and Information Science, pages 519-532, Springer, 2017. [doi]
@inproceedings{AliG17-2, title = {New Energy Efficient Reconfigurable FIR Filter Architecture and Its VLSI Implementation}, author = {Naushad Ali and Bharat Garg}, year = {2017}, doi = {10.1007/978-981-10-7470-7_51}, url = {https://doi.org/10.1007/978-981-10-7470-7_51}, researchr = {https://researchr.org/publication/AliG17-2}, cites = {0}, citedby = {0}, pages = {519-532}, booktitle = {VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers}, editor = {Brajesh Kumar Kaushik and Sudeb Dasgupta and Virendra Singh}, volume = {711}, series = {Communications in Computer and Information Science}, publisher = {Springer}, isbn = {978-981-10-7470-7}, }