Mixed Full Adder topologies for high-performance low-power arithmetic circuits

Massimo Alioto, Giuseppe Di Cataldo, Gaetano Palumbo. Mixed Full Adder topologies for high-performance low-power arithmetic circuits. Microelectronics Journal, 38(1):130-139, 2007. [doi]

@article{AliotoCP07,
  title = {Mixed Full Adder topologies for high-performance low-power arithmetic circuits},
  author = {Massimo Alioto and Giuseppe Di Cataldo and Gaetano Palumbo},
  year = {2007},
  doi = {10.1016/j.mejo.2006.09.001},
  url = {http://dx.doi.org/10.1016/j.mejo.2006.09.001},
  researchr = {https://researchr.org/publication/AliotoCP07},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {38},
  number = {1},
  pages = {130-139},
}