N. Ruiz Amador, V. Huard, E. Pion, F. Cacho, Damien Croain, V. Robert, Sylvain Engels, Philippe Flatresse, L. Anghel. Bottom-up digital system-level reliability modeling. In Rakesh Patel, Tom Andre, Aurangzeb Khan, editors, 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011. pages 1-4, IEEE, 2011. [doi]
@inproceedings{AmadorHPCCREFA11,
title = {Bottom-up digital system-level reliability modeling},
author = {N. Ruiz Amador and V. Huard and E. Pion and F. Cacho and Damien Croain and V. Robert and Sylvain Engels and Philippe Flatresse and L. Anghel},
year = {2011},
doi = {10.1109/CICC.2011.6055343},
url = {http://dx.doi.org/10.1109/CICC.2011.6055343},
researchr = {https://researchr.org/publication/AmadorHPCCREFA11},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011},
editor = {Rakesh Patel and Tom Andre and Aurangzeb Khan},
publisher = {IEEE},
isbn = {978-1-4577-0222-8},
}