Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device

Motoki Amagasaki, Takurou Shimokawa, Kazunori Matsuyama, Ryoichi Yamaguchi, Hideaki Nakayama, Naoto Hamabe, Masahiro Iida, Toshinori Sueyoshi. Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 198-203, IEEE, 2006. [doi]

Authors

Motoki Amagasaki

This author has not been identified. Look up 'Motoki Amagasaki' in Google

Takurou Shimokawa

This author has not been identified. Look up 'Takurou Shimokawa' in Google

Kazunori Matsuyama

This author has not been identified. Look up 'Kazunori Matsuyama' in Google

Ryoichi Yamaguchi

This author has not been identified. Look up 'Ryoichi Yamaguchi' in Google

Hideaki Nakayama

This author has not been identified. Look up 'Hideaki Nakayama' in Google

Naoto Hamabe

This author has not been identified. Look up 'Naoto Hamabe' in Google

Masahiro Iida

This author has not been identified. Look up 'Masahiro Iida' in Google

Toshinori Sueyoshi

This author has not been identified. Look up 'Toshinori Sueyoshi' in Google