Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device

Motoki Amagasaki, Takurou Shimokawa, Kazunori Matsuyama, Ryoichi Yamaguchi, Hideaki Nakayama, Naoto Hamabe, Masahiro Iida, Toshinori Sueyoshi. Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 198-203, IEEE, 2006. [doi]

@inproceedings{AmagasakiSMYNHIS06,
  title = {Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device},
  author = {Motoki Amagasaki and Takurou Shimokawa and Kazunori Matsuyama and Ryoichi Yamaguchi and Hideaki Nakayama and Naoto Hamabe and Masahiro Iida and Toshinori Sueyoshi},
  year = {2006},
  doi = {10.1109/VLSISOC.2006.313233},
  url = {http://dx.doi.org/10.1109/VLSISOC.2006.313233},
  tags = {architecture, logic},
  researchr = {https://researchr.org/publication/AmagasakiSMYNHIS06},
  cites = {0},
  citedby = {0},
  pages = {198-203},
  booktitle = {IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006},
  publisher = {IEEE},
}