Ajith Amerasekera. Concurrent Optimization of Technology and Design for Nano CMOS. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 27, IEEE Computer Society, 2007. [doi]
@inproceedings{Amerasekera07,
title = {Concurrent Optimization of Technology and Design for Nano CMOS},
author = {Ajith Amerasekera},
year = {2007},
doi = {10.1109/VLSID.2007.51},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.51},
tags = {optimization, design},
researchr = {https://researchr.org/publication/Amerasekera07},
cites = {0},
citedby = {0},
pages = {27},
booktitle = {20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-2502-4},
}