Gadgil Amruta, Parthe Yogita, Pathak Puja, P. V. Sriniwas Shastry. Low latency and high accuracy archtectures of cordic algorithm for cosine calculation on FPGA. In 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. pages 478-481, IEEE, 2008. [doi]
Abstract is missing.