Establishing latch correspondence for embedded circuits of PowerPC microprocessors

Himyanshu Anand, Jayanta Bhadra, Alper Sen 0001, Magdy S. Abadir, Kenneth G. Davis. Establishing latch correspondence for embedded circuits of PowerPC microprocessors. In Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30 - December 2, 2005. pages 37-44, IEEE Computer Society, 2005. [doi]

Authors

Himyanshu Anand

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Jayanta Bhadra

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Alper Sen 0001

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Magdy S. Abadir

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Kenneth G. Davis

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