VLSI decoder architecture for embedded zerotree wavelet algorithm - researchr publication authors

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Li-minn Ang, Hon Nin Cheung, Kamran Eshraghian. VLSI decoder architecture for embedded zerotree wavelet algorithm. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 141-144, IEEE, 1999. [doi]

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