VLSI decoder architecture for embedded zerotree wavelet algorithm

Li-minn Ang, Hon Nin Cheung, Kamran Eshraghian. VLSI decoder architecture for embedded zerotree wavelet algorithm. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 141-144, IEEE, 1999. [doi]

@inproceedings{AngCE99,
  title = {VLSI decoder architecture for embedded zerotree wavelet algorithm},
  author = {Li-minn Ang and Hon Nin Cheung and Kamran Eshraghian},
  year = {1999},
  doi = {10.1109/ISCAS.1999.777823},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.1999.777823},
  tags = {architecture},
  researchr = {https://researchr.org/publication/AngCE99},
  cites = {0},
  citedby = {0},
  pages = {141-144},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA},
  publisher = {IEEE},
  isbn = {0-7803-5471-0},
}