High throughput architecture for low density parity check (LDPC) encoder

Silvia Anggraeni, Fawnizu Azmadi Hussin, Varun Jeoti. High throughput architecture for low density parity check (LDPC) encoder. In IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013, Columbus, OH, USA, August 4-7, 2013. pages 948-951, IEEE, 2013. [doi]

@inproceedings{AnggraeniHJ13,
  title = {High throughput architecture for low density parity check (LDPC) encoder},
  author = {Silvia Anggraeni and Fawnizu Azmadi Hussin and Varun Jeoti},
  year = {2013},
  doi = {10.1109/MWSCAS.2013.6674807},
  url = {https://doi.org/10.1109/MWSCAS.2013.6674807},
  researchr = {https://researchr.org/publication/AnggraeniHJ13},
  cites = {0},
  citedby = {0},
  pages = {948-951},
  booktitle = {IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013, Columbus, OH, USA, August 4-7, 2013},
  publisher = {IEEE},
}