S. Aranake, Vijay K. Raj, M. Vashi, Hee Yong Youn. Optimal register allocation in high level synthesis. In Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, Kalamazoo, MI, USA, March 5-6, 1993. pages 71-75, IEEE, 1993. [doi]
@inproceedings{AranakeRVY93,
title = {Optimal register allocation in high level synthesis},
author = {S. Aranake and Vijay K. Raj and M. Vashi and Hee Yong Youn},
year = {1993},
doi = {10.1109/GLSV.1993.224477},
url = {http://dx.doi.org/10.1109/GLSV.1993.224477},
researchr = {https://researchr.org/publication/AranakeRVY93},
cites = {0},
citedby = {0},
pages = {71-75},
booktitle = {Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, Kalamazoo, MI, USA, March 5-6, 1993},
publisher = {IEEE},
isbn = {0-8186-3430-8},
}