ESESC: A fast multicore simulator using Time-Based Sampling

Ehsan K. Ardestani, Jose Renau. ESESC: A fast multicore simulator using Time-Based Sampling. In 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013. pages 448-459, IEEE Computer Society, 2013. [doi]

Abstract

Abstract is missing.