Mark G. Arnold. A RISC Processor with Redundant LNS Instructions. In Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia. pages 475-482, IEEE Computer Society, 2006. [doi]
@inproceedings{Arnold06:4,
title = {A RISC Processor with Redundant LNS Instructions},
author = {Mark G. Arnold},
year = {2006},
doi = {10.1109/DSD.2006.15},
url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2006.15},
researchr = {https://researchr.org/publication/Arnold06%3A4},
cites = {0},
citedby = {0},
pages = {475-482},
booktitle = {Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia},
publisher = {IEEE Computer Society},
isbn = {0-7695-2609-8},
}