Sachille Atapattu, Namitha Liyanage, Nisal Menuka, Ishantha Perera, Ajith Pasqual. Real time all intra HEVC HD encoder on FPGA. In 27th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2016, London, United Kingdom, July 6-8, 2016. pages 191-195, IEEE Computer Society, 2016. [doi]
@inproceedings{AtapattuLMPP16,
title = {Real time all intra HEVC HD encoder on FPGA},
author = {Sachille Atapattu and Namitha Liyanage and Nisal Menuka and Ishantha Perera and Ajith Pasqual},
year = {2016},
doi = {10.1109/ASAP.2016.7760792},
url = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2016.7760792},
researchr = {https://researchr.org/publication/AtapattuLMPP16},
cites = {0},
citedby = {0},
pages = {191-195},
booktitle = {27th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2016, London, United Kingdom, July 6-8, 2016},
publisher = {IEEE Computer Society},
isbn = {978-1-5090-1503-0},
}