Efficient pipelined tunable heterodyne notch filter implementation in FPGAs - researchr publication authors

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Asad Azam, Dhinesh Sasidaran, Karl E. Nelson, Gary E. Ford, Louis G. Johnson, Michael A. Soderstrand. Efficient pipelined tunable heterodyne notch filter implementation in FPGAs. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 373-376, IEEE, 2000. [doi]

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