Efficient pipelined tunable heterodyne notch filter implementation in FPGAs

Asad Azam, Dhinesh Sasidaran, Karl E. Nelson, Gary E. Ford, Louis G. Johnson, Michael A. Soderstrand. Efficient pipelined tunable heterodyne notch filter implementation in FPGAs. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 373-376, IEEE, 2000. [doi]

@inproceedings{AzamSNFJS00,
  title = {Efficient pipelined tunable heterodyne notch filter implementation in FPGAs},
  author = {Asad Azam and Dhinesh Sasidaran and Karl E. Nelson and Gary E. Ford and Louis G. Johnson and Michael A. Soderstrand},
  year = {2000},
  doi = {10.1109/ISCAS.2000.857442},
  url = {https://doi.org/10.1109/ISCAS.2000.857442},
  researchr = {https://researchr.org/publication/AzamSNFJS00},
  cites = {0},
  citedby = {0},
  pages = {373-376},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
  publisher = {IEEE},
}