Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits

Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, John Compiet, Stéphane Donnay, Georges G. E. Gielen, Hugo J. De Man. Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits. J. Solid-State Circuits, 37(11):1383-1395, 2002. [doi]

@article{BadarogluHGCDGM02,
  title = {Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits},
  author = {Mustafa Badaroglu and Marc van Heijningen and Vincent Gravot and John Compiet and Stéphane Donnay and Georges G. E. Gielen and Hugo J. De Man},
  year = {2002},
  doi = {10.1109/JSSC.2002.803938},
  url = {https://doi.org/10.1109/JSSC.2002.803938},
  researchr = {https://researchr.org/publication/BadarogluHGCDGM02},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {37},
  number = {11},
  pages = {1383-1395},
}