A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

Yong-Cheol Bae, Joon Young Park, Sang Jae Rhee, Seung Bum Ko, Yonggwon Jeong, Kwang-Sook Noh, Younghoon Son, Jaeyoun Youn, Yonggyu Chu, Hyunyoon Cho, Mijo Kim, Daesik Yim, Hyo-Chang Kim, Sang-Hoon Jung, Hye-In Choi, Sungmin Yim, Jung-Bae Lee, Joo-Sun Choi, Kyungseok Oh. A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme. In 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012. pages 44-46, IEEE, 2012. [doi]

@inproceedings{BaePRKJNSYCCKYKJCYLCO12,
  title = {A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme},
  author = {Yong-Cheol Bae and Joon Young Park and Sang Jae Rhee and Seung Bum Ko and Yonggwon Jeong and Kwang-Sook Noh and Younghoon Son and Jaeyoun Youn and Yonggyu Chu and Hyunyoon Cho and Mijo Kim and Daesik Yim and Hyo-Chang Kim and Sang-Hoon Jung and Hye-In Choi and Sungmin Yim and Jung-Bae Lee and Joo-Sun Choi and Kyungseok Oh},
  year = {2012},
  doi = {10.1109/ISSCC.2012.6176871},
  url = {http://dx.doi.org/10.1109/ISSCC.2012.6176871},
  researchr = {https://researchr.org/publication/BaePRKJNSYCCKYKJCYLCO12},
  cites = {0},
  citedby = {0},
  pages = {44-46},
  booktitle = {2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-0376-7},
}