Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation

Xu Bai, Naoki Banno, Makoto Miyamura, Ryusuke Nebashi, Koichiro Okamoto, Hideaki Numata, Noriyuki Iguchi, Masanori Hashimoto, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada. Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation. J. Solid-State Circuits, 57(7):2250-2262, 2022. [doi]

@article{BaiBMNONIHSST22,
  title = {Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation},
  author = {Xu Bai and Naoki Banno and Makoto Miyamura and Ryusuke Nebashi and Koichiro Okamoto and Hideaki Numata and Noriyuki Iguchi and Masanori Hashimoto and Tadahiko Sugibayashi and Toshitsugu Sakamoto and Munehiro Tada},
  year = {2022},
  doi = {10.1109/JSSC.2021.3117260},
  url = {https://doi.org/10.1109/JSSC.2021.3117260},
  researchr = {https://researchr.org/publication/BaiBMNONIHSST22},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {57},
  number = {7},
  pages = {2250-2262},
}