Yu Bai, Abigail Fuentes, Mingjie Lin, Mike Riera. Exploiting algorithmic-level memory parallelism in distributed logic-memory architecture through hardware-assisted dynamic graph (abstract only). In Brad L. Hutchings, Vaughn Betz, editors, The 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA '13, Monterey, CA, USA, February 11-13, 2013. pages 273, ACM, 2013. [doi]
Abstract is missing.