A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC

Abhishek Bandyopadhyay, Robert Adams, Khiem Nguyen, Paul Baginski, David Lamb, Thomas Tansley. A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]

@inproceedings{BandyopadhyayAN14,
  title = {A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC},
  author = {Abhishek Bandyopadhyay and Robert Adams and Khiem Nguyen and Paul Baginski and David Lamb and Thomas Tansley},
  year = {2014},
  doi = {10.1109/VLSIC.2014.6858397},
  url = {http://dx.doi.org/10.1109/VLSIC.2014.6858397},
  researchr = {https://researchr.org/publication/BandyopadhyayAN14},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-3327-3},
}