A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC

Abhishek Bandyopadhyay, Robert Adams, Khiem Nguyen, Paul Baginski, David Lamb, Thomas Tansley. A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]

Abstract

Abstract is missing.