Electrical modeling of Through Silicon and Package Vias

Tapobrata Bandyopadhyay, Ritwik Chatterjee, Daehyun Chung, Madhavan Swaminathan, Rao Tummala. Electrical modeling of Through Silicon and Package Vias. In IEEE International Conference on 3D System Integration, 3DIC 2009, San Francisco, California, USA, 28-30 September 2009. pages 1-8, IEEE, 2009. [doi]

Abstract

Abstract is missing.