Subir Bandyopadhyay, Arunita Jaekel, Graham A. Jullien. A Method for Synthesizing Area Efficient Multilevel PTL Circuits. In 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India. pages 516-519, IEEE Computer Society, 1997. [doi]
Abstract is missing.