Synchronous Test Generation Model for Asynchronous Circuits - researchr publication authors

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Savita Banerjee, Srimat T. Chakradhar, Rabindra K. Roy. Synchronous Test Generation Model for Asynchronous Circuits. In 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India. pages 178-185, IEEE Computer Society, 1996. [doi]

This author has not been identified. Look up 'Savita Banerjee' in GoogleThis author has not been identified. Look up 'Srimat T. Chakradhar' in GoogleThis author has not been identified. Look up 'Rabindra K. Roy' in Google

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