Savita Banerjee, Srimat T. Chakradhar, Rabindra K. Roy. Synchronous Test Generation Model for Asynchronous Circuits. In 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India. pages 178-185, IEEE Computer Society, 1996. [doi]
@inproceedings{BanerjeeCR96,
title = {Synchronous Test Generation Model for Asynchronous Circuits},
author = {Savita Banerjee and Srimat T. Chakradhar and Rabindra K. Roy},
year = {1996},
doi = {10.1109/ICVD.1996.489481},
url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489481},
tags = {testing},
researchr = {https://researchr.org/publication/BanerjeeCR96},
cites = {0},
citedby = {0},
pages = {178-185},
booktitle = {9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India},
publisher = {IEEE Computer Society},
}