FIFO power optimization for on-chip networks

Sudarshan Banerjee, Nikil D. Dutt. FIFO power optimization for on-chip networks. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 187-191, ACM, 2004. [doi]

@inproceedings{BanerjeeD04,
  title = {FIFO power optimization for on-chip networks},
  author = {Sudarshan Banerjee and Nikil D. Dutt},
  year = {2004},
  doi = {10.1145/988952.988998},
  url = {http://doi.acm.org/10.1145/988952.988998},
  tags = {optimization},
  researchr = {https://researchr.org/publication/BanerjeeD04},
  cites = {0},
  citedby = {0},
  pages = {187-191},
  booktitle = {Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004},
  editor = {David Garrett and John Lach and Charles A. Zukowski},
  publisher = {ACM},
  isbn = {1-58113-853-9},
}