Sabyasachee Banerjee, Subhashis Majumder, Debesh K. Das. Partitioning-based test time reduction for core-based 3DICs. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-5, IEEE, 2015. [doi]
Abstract is missing.