Aditya Bansal, Saibal Mukhopadhyay, Kairshik Roy. Modeling and optimization approach to robust and low-power FinFET SRAM design in nanoscale era. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 835-838, IEEE, 2005. [doi]
Abstract is missing.