ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems

Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar 0001. ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(9):1754-1767, 2021. [doi]

Abstract

Abstract is missing.