Ian J. Barge, Cristinel Ababei. H.264 video decoder implemented on FPGAs using 3×3 and 2×2 networks-on-chip. In International Conference on ReConFigurable Computing and FPGAs, ReConFig 2017, Cancun, Mexico, December 4-6, 2017. pages 1-6, IEEE, 2017. [doi]
@inproceedings{BargeA17-0,
title = {H.264 video decoder implemented on FPGAs using 3×3 and 2×2 networks-on-chip},
author = {Ian J. Barge and Cristinel Ababei},
year = {2017},
doi = {10.1109/RECONFIG.2017.8279798},
url = {https://doi.org/10.1109/RECONFIG.2017.8279798},
researchr = {https://researchr.org/publication/BargeA17-0},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig 2017, Cancun, Mexico, December 4-6, 2017},
publisher = {IEEE},
isbn = {978-1-5386-3797-5},
}