Junction leakage current degradation under high temperature reverse-bias stress induced by band-defect-band tunnelling in power VDMOS

Giacomo Barletta, Giuseppe CurrĂ². Junction leakage current degradation under high temperature reverse-bias stress induced by band-defect-band tunnelling in power VDMOS. Microelectronics Reliability, 45(5-6):994-999, 2005. [doi]

Abstract

Abstract is missing.