Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers

Andrea Bartolini, Federico Ficarelli, Emanuele Parisi, Francesco Beneventi, Francesco Barchi, Daniele Gregori, Fabrizio Magugliani, Marco Cicala, Cosimo Gianfreda, Daniele Cesarini, Andrea Acquaviva, Luca Benini. Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers. In Sakir Sezer, Thomas Büchner, Jürgen Becker 0001, Andrew Marshall, Fahad Siddiqui 0001, Tanja Harbaum, Kieran McLaughlin, editors, 35th IEEE International System-on-Chip Conference, SOCC 2022, Belfast, United Kingdom, September 5-8, 2022. pages 1-6, IEEE, 2022. [doi]

Abstract

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