Efficient Fault Simulation of CMOS Circuits with Accurate Models

Zeev Barzilai, J. Lawrence Carter, Vijay S. Iyengar, Indira Nair, Barry K. Rosen, Joe D. Rutledge, Gabriel M. Silberman. Efficient Fault Simulation of CMOS Circuits with Accurate Models. In Proceedings International Test Conference 1986, Washington, D.C., USA, September 1986. pages 520-529, IEEE Computer Society, 1986.

Abstract

Abstract is missing.