Gabriel M. Silberman - researchr alias

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Viewing Publication 1 - 39 from 39

2012

The 4x6 Tiered Architecture Method: An Approach to the Design of Enterprise SolutionsEthan Hadar, Irit Hadar, Gabriel M. Silberman, John J. Harrison Jr.. caise 2012: 180-191 [doi]

2008

Agile architecture methodology: long term strategy interleaved with short term tacticsEthan Hadar, Gabriel M. Silberman. OOPSLA 2008: 641-652 [doi]

2003

IntroductionMichael A. Bauer, Gene F. Hoffnagle, J. Howard Johnson, Gabriel M. Silberman. isf, 5(2):127-128, 2003. [doi]

2002

IntroductionMichael A. Bauer, Gene F. Hoffnagle, J. Howard Johnson, Gabriel M. Silberman. isf, 4(4):359-361, 2002. [doi]

2001

New Software Engineering Faculty SymposiumLeon J. Osterweil, Gabriel M. Silberman, Kenny Wong. ICSE 2001: 813-813

1997

Foreword to the special issuesWalid A. Najjar, Gabriel M. Silberman. ijpp, 25(4):243-244, 1997. [doi]

Overview: The Centre for Advanced StudiesStephen G. Perelgut, Gabriel M. Silberman, Kelly A. Lyons, Karen Bennet. IBMSJ, 36(4):474-488, 1997.

1996

The Third International Conference on Parallel Computing Technologies (PaCT-95), Saint Petersburg, RussiaGabriel M. Silberman. SIGPLAN, 31(2):8-9, 1996.

1994

VLIW Compilation Techniques in a Superscalar EnvironmentKemal Ebcioglu, Randy D. Groves, Ki-Chang Kim, Gabriel M. Silberman, Isaac Ziv. PLDI 1994: 36-48

A backtracing-oriented procedure for the analysis of combinational gate-level designsGabriel M. Silberman, Ilan Y. Spillinger. integration, 17(3):271-286, 1994. [doi]

1993

An Architectural Framework for Supporting Heterogeneous Instruction-Set ArchitecturesGabriel M. Silberman, Kemal Ebcioglu. Computer, 26(6):39-56, 1993.

Architectural Improvement for a Data-Driven VLSI Processing ArrayShlomit Weiss, Ilan Y. Spillinger, Gabriel M. Silberman. jpdc, 19(4):308-322, 1993.

1992

An architectural framework for migration from CISC to higher performance platformsGabriel M. Silberman, Kemal Ebcioglu. ics 1992: 198-215 [doi]

1991

RIDDLE: A Foundation for Test Generation on a High-Level Design DescriptionGabriel M. Silberman, Ilan Y. Spillinger. TC, 40(1):80-87, 1991.

Functional Fault Simulation as a Guide for Biased-Random Test Pattern GenerationGabriel M. Silberman, Ilan Y. Spillinger. TC, 40(1):66-79, 1991.

1990

Using functional fault simulation and the difference fault model to estimate implementation fault coverageGabriel M. Silberman, Ilan Y. Spillinger. tcad, 9(12):1335-1343, 1990. [doi]

1989

Whistle: A Workbench for Test Development of Library-Based DesignsRaphael Renous, Gabriel M. Silberman, Ilan Y. Spillinger. Computer, 22(4):27-41, 1989.

Architectural Improvements for Data-Driven VLSI Processing ArraysShlomit Weiss, Ilan Y. Spillinger, Gabriel M. Silberman. fpca 1989: 243-259 [doi]

1988

1987

The Effect of Operation Scheduling on the Performance of a Data Flow ComputerMichael Granski, Israel Koren, Gabriel M. Silberman. TC, 36(9):1019-1029, 1987.

Mapping Data Flow Programs on a VLSI Array of ProcessorsBilha Mendelson, Gabriel M. Silberman. isca 1987: 72-80

An Improved Mapping of Data Flow Programs on a VLSI Array of ProcessorsBilha Mendelson, Gabriel M. Silberman. icpp 1987: 871-873

1986

1985

Accurate Fault Modeling and Efficient Simulation of Differential CVS CircuitsZeev Barzilai, Vijay S. Iyengar, Barry K. Rosen, Gabriel M. Silberman. itc 1985: 722-731

1984

Using a Hardware Simulation Engine for Custom MOS Structured DesignsZeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Gabriel M. Silberman. ibmrd, 28(5):564-571, 1984.

Fast Pass-Transistor Simulation for Custom MOS CircuitsZeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo. dt, 1(1):71-81, 1984. [doi]

Embedding Tree Stuctures in VLlSI Hexagonal ArraysDan Gordon, Israel Koren, Gabriel M. Silberman. TC, 33(1):104-107, 1984.

1983

Simulating pass transistor circuits using logic simulation machinesZeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo. dac 1983: 157-163 [doi]

A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow ApproachIsrael Koren, Gabriel M. Silberman. icpp 1983: 335-337

Delayed-Staging Hierarchy OptimizationGabriel M. Silberman. TC, 32(11):1029-1037, 1983.

Stack Processing Techniques in Delayed-Staging Storage HierarchiesGabriel M. Silberman. CACM, 26(11):999-1007, 1983.

1982

Determining Fault Ratios in Multilevel Delayed-Staging Storage HierarchiesGabriel M. Silberman. TC, 31(4):305-310, 1982.

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