Abstract is missing.
- Dynamic Processor Self-Scheduling for General Parallel Nested LoopsZhixi Fang, Peiyi Tang, Pen-Chung Yew, Chuan-Qi Zhu. 1-10
- Deadlock Prevention in Processor Self-Scheduling for Parallel Nested LoopsZhixi Fang, Peiyi Tang, Pen-Chung Yew, Chuan-Qi Zhu. 11-18
- What s In a Name? -or- The Value of Renaming for Parallelism Detection and Storage AllocationRon Cytron, Jeanne Ferrante. 19-27
- : Data Prefetching In Shared Memory MultiprocessorsRoland L. Lee, Pen-Chung Yew, Duncan H. Lawrie. 28-31
- Multi-Level Execution In Data-Flow ArchitecturesWalid A. Najjar, Jean-Luc Gaudiot. 32-39
- Organization of an Instruction Scheduling and Token Storage Unit in a Tagged Token Dataflow MachineStephen A. Brobst. 40-46
- A New Parallel Graph Reduction Model and Its Machine ArchitectureMakoto Amamiya. 46-49
- Parallel Processing on VLSI Associative MemorySener Ilgen, Isaac D. Scherson. 50-53
- Advanced General Purpose Multicomputer for Space ApplicationsR. D. Rasmussen, G. S. Bolotin, Nikitas J. Dimopoulos, B. F. Lewis, R. M. Manning. 54-57
- Simple, Efficient Asynchronous Parallel Prefix AlgorithmsAlbert G. Greenberg, Boris D. Lubachevsky. 66-69
- Crowd Control: Coordinating Processes in ParallelThomas J. LeBlanc, Sanjay Jain. 81-84
- A Proposal for Optimization of Distributed Concurrency ControlMasud Rahgozar, Colette Rolland. 93-96
- Parallel Access to Synchronization VariablesD. N. Jayasimha. 97-100
- On Easily Testable and Reconfigurable Two-Dimensional Systolic ArraysJungbae H. Kim, Sridhar Reddy Adnapally. 101-109
- Dynamic Reconfiguration for Fault-Tolerant Systolic ArraysDerek C. W. Pao, Hon F. Li, R. Jayakumar. 110-113
- Influence of Built-In Self Test on the Performance of Fault Tolerant VLSI MultiprocessorsDavid L. Landis, Daniel C. Muha, William A. Check. 114-116
- A Software-Based Hardware Fault Tolerance Scheme for MulticomputersYuval Tamir, Eli Gafni. 117-120
- Graceful Degradation of Fault Tolerant Multistage Interconnection NetworksShih-Chian Yang, John A. Silvester. 121-123
- Simultaneous Update of Priority StructuresJit Biswas, James C. Browne. 124-131
- Compression Trees and Their ApplicationsEliezer Dekel, Simeon C. Ntafos, Shietung Peng. 132-139
- A Parallel Model and Architecture for Production SystemsAbimbola O. Oshisanwo, Paul P. Dasiewicz. 147-153
- Parallel Link Resolution of Connection Graph Refutation and Its ImplementationRasiah Loganantharaj. 154-157
- Combinators as Control Mechanisms in Multiprocessing SystemsDeborah Knox, Charles T. Wright. 158-161
- An AND-OR Parallel Execution System for Logic Program EvaluationNam Sung Woo, Ramautar Sharma. 162-165
- PESA I-A Parallel Architecture for Production SystemsFranz Schreiner, Gerhard Zimmermann. 166-169
- On Area Efficient and Fault Tolerant Tree Embedding In VLSIHee Yong Youn, Adit D. Singh. 170-177
- Embeddings Among Toruses and MeshesY. W. Eva Ma, Lixin Tao. 178-187
- On the Embedding of Arbitrary Meshes in Boolean Cubes With Expansion Two Dilation TwoChing-Tien Ho, S. Lennart Johnsson. 188-191
- A Resilient Distributed Algorithm for Minimum-Weight Spanning TreesI. Arieh Cimet, Srikanta P. R. Kumar. 196-203
- Parallel Algorithm for Maximum Weight Matching in TreesShaunak Pawagi. 204-206
- A VLSI Implementation of All-Pair Shortest Path ProblemGopal Lakhani, R. Dorairaj. 207-209
- Divide and Conquer for a Shortest Path ProblemAn-Chi Liu, Y. M. Zou, Der-Ming Liou. 210-212
- An O(n^2 m^1/2) Distributed Max-Flow AlgorithmJohn M. Marberg, Eli Gafni. 213-216
- Minimum Distance: A Method for Partitioning Recurrences for MultiprocessorsJih-Kwon Peir, Ron Cytron. 217-225
- Limited Processor Scheduling of Doacross LoopsRon Cytron. 226-234
- Loop Coalesing: A Compiler Transformation for Parallel MachinesConstantine D. Polychronopoulos. 235-242
- A Class of Boolean Linear Transformations for Conflict-Free Power-of-Two Stride AccessAlan Norton, Evelyn Melton. 247-254
- Effect of Invalidations on the Hit Ratio of Cache-Based MultiprocessorsMichel Dubois. 255-257
- Architectural Choices for Multi-level Cache HierarchiesJean-Loup Baer, Wen-Hann Wang. 258-261
- Crosspoint Cache ArchitecturesDonald C. Winsor, Trevor N. Mudge. 266-269
- Optimal Randomized Parallel Algorithms for Computational GeometryJohn H. Reif, Sandeep Sen. 270-277
- Randomized Parallel Algorithms for Prolog Programs and Backtracking ApplicationsVirendra K. Janakiram, Dharma P. Agrawal, Ravi Mehrotra. 278-281
- Mesh Computer Algorithms for Line Segments and Simple PolygonsRuss Miller, Quentin F. Stout. 282-285
- Near-Optimal Speedup of Graphics Algorithms Using Multigauge Parallel ComputersTony DeRose, Lawrence Snyder, Chyan Yang. 289-294
- Estimating Interlock and Improving Balance for Pipelined ArchitecturesDavid Callahan, Ken Kennedy, John Cocke. 295-304
- Exploiting Loop Level Parallelism in Nonprocedural Dataflow ProgramsMaya Gokhale. 305-311
- Architecture of a One-Chip Data Driven Processor: Q-pHiroaki Nishikawa, Hiroaki Terada, Kohji Komatsu, Shin-ichi Yoshida, Toshiya Okamoto, Yoshiko Tsuji, Saki Takakura, Tsuyoshi Tokura, Yoichiro Nishikawwa, Shuji Hara, Mitsuo Meichi. 319-326
- Hardware Structure of a One-Chip Data Driven Processor: Q-pKatsuhiko Asada, Hiroaki Terada, Satoshi Matsumoto, Souichi Miyata, Hajime Asano, Hiroki Miura, Masahisa Shimizu, Shinji Komori, Takeshi Fukuhara, Kenji Shima. 327-329
- A Special Function Unit for Database Operations Within a Data-Control Flow SystemHerman Lam, Stanley Y. W. Su, F. L. C. Seeger, William R. Eisenstadt. 330-339
- A Hardware Memory Mapping Unit for Efficient Address ComputationPaul T. Hulina, Lee D. Coraor. 340-343
- Optimizing Memory Throughput In a Tightly Coupled MultiprocessorAndré Seznec, Yvon Jégou. 344-346
- Problem Size, Parallel Architecture, and Optimal SpeedupDavid M. Nicol, Frank H. Willard. 347-354
- Designing Parallel Algorithms from Regular Graphs and Semi-Regular GraphsGen-Huey Chen, Maw-Sheng Chern. 363-366
- Active Channels and Their Applications to Parallel ComputingMiron Livny, Udi Manber. 367-369
- DURRA : A Task-Level Description LanguageMario Barbacci, Jeannette M. Wing. 370-376
- Multilanguage Parallel ProgrammingRoberto Bisiani, Alessandro Forin. 381-384
- Parallel Pascal and the FPS Hypercube SupercomputerAnthony P. Reeves, Donna Bergmark. 385-388
- Parallel Programming and the CONSUL LanguageDoug Baldwin, Cesar Quiroz. 389-392
- The Star Graph: An Attractive Alternative to the n-CubeSheldon B. Akers, Balakrishnan Krishnamurthy, Dov Harel. 393-400
- Uniform Minimal Full-Access NetworksM. A. Sridhar, C. S. Raghavendra. 401-406
- The Lambda Network: A New Permutation NetworkDaeshik Lee. 407-410
- Polymorphic-Torus NetworkHungwen Li, Massimo Maresca. 411-414
- Implementation of a Four Color Cell Relaxation Scheme on the MPP, Flex/32 and CRAY/2Raad A. Fatoohi, Chester E. Grosch. 424-426
- Environments for Prototyping Parallel AlgorithmsJames M. Purtilo, Daniel A. Reed, Dirk Grunwald. 431-438
- The Pisces 2 Parallel Programming EnvironmentTerrence W. Pratt. 439-445
- A Knowledge Based Parallelization Tool in a Programming EnvironmentThomas Brandes, Manfred Sommer. 446-448
- PARPC : A System for Parallel Procedure CallsBruce Martin, Charles Bergan, Brian Russ. 449-452
- Re-Routing and Resequencing in Multistage Interconnection NetworksAlain Jean-Marie. 453-460
- On the Number of Permutations Performable by Extra-Stage Multistage Interconnection NetworksIsrael Gazit, Miroslaw Malek. 461-470
- Fault Tolerance Analysis of Rearrangeable NetworksSimin H. Pakzad. 471-474
- A Heuristic Algorithm for Conflict Resolution Problem Multistage Interconnection NetworksZhixi Fang, Jitender S. Deogun. 475-478
- The Communication Efficiency fo Meshes, Boolean Cubes and Cube Connected Cycles for Wafer Scale IntegratonAbhiram G. Ranade, S. Lennart Johnsson. 479-482
- PSOLVE : A Concurrent Algorithm for Solving Sparse Systems of Linear EquationsTimothy A. Davis, Edward S. Davidson. 483-490
- Parallel Implementations of Gradient Based Iterative Algorithms for a Class of Discrete Optimal Control ProblemsGerard G. L. Meyer, Louis J. Podrazik. 491-494
- Optimization of Householder Transformations Part I: Linear Least SquaresJim Armstrong. 495-498
- Asynchronous Relaxation of Non-Numerical DataAydin Üresin, Michel Dubois. 499-501
- Implementation of An Automatic Program Partitioner on a Homogeneous MultiprocessorErik H. D Hollander, Johan Opsommer. 517-520
- Semi-Automatic Domain Decomposition in BLAZECharles Koelbel, Piyush Mehrotra, John Van Rosendale. 521-524
- Evaluation of Effectivenesss of Circuit Based and Packet Based Interconnection Networks Via Petri Net ModelsAshok K. Adiga, Sanjay R. Deshpande. 533-541
- Performance Analysis and Comparison of Packet Switching Interconnection NetworksHyunsoo Yoon, Kyungsook Y. Lee, Ming T. Liu. 542-545
- Minimal-Distance Routing for Kykios IIDing-Zhu Du, Frank K. Hwang, Andrew M. Odlyzko, Yanjun Zhang. 546-549
- A Fixed Size Systolic Array for Arbitrarily Large Eigenvalue ProblemsHenry Y. H. Chuang, Ling Chen. 550-556
- Parallel Designs for Chinese Remainder ConversionChang-Nian Zhang, Behrooz Shirazi, David Y. Y. Yun. 557-559
- Iterative Solution of Sparse Linear Systems on Systolic ArraysRami G. Melhem. 560-563
- Transitive Closure Partitioning and Its Mapping to a Systolic ArrayFernando J. Nuñez, Núria Torralba. 564-566
- Algorithms and Data Structures for Parallel Incremental ParsingNeal M. Gafter. 577-584
- An Optimal Parallel Parsing Algorithm for a Class of Block Structured LanguagesDilip Sarkar, Narsingh Deo. 585-588
- Parallel Parsing of Arithmetic ExpressionsY. N. Srikant. 589-591
- The Homogeneous Multiprocessor System, An OverviewNikitas J. Dimopoulos, Kin F. Li, Eric Chi-Wah Wong, R. V. Dantu, J. William Atwood. 592-599
- An Integrated Software-Hardware Multiprocesor ProjectRudy Lauwereins, J. A. Peperstraete. 618-620
- Algorithms for Matrix Transposition on Boolean n-Cube Configured Ensemble ArchitecturesS. Lennart Johnsson, Ching-Tien Ho. 621-629
- Maze Routing on a Hypercube Multiprocessor ComputerYoungju Won, Sartaj Sahni. 630-637
- Using Hypercube Multiprocessors to Determine Geometric Properties of Digitized PicturesRuss Miller, Susan E. Miller. 638-640
- Large Grain Parallel Conjugate Gradient Algorithms on a Hypercube MultiprocessorCevdet Aykanat, Füsun Özgüner. 641-644
- The SDEF Systolic Programming SystemBradley R. Engstrom, Peter R. Cappello. 645-652
- A Speedup Analyzer for Parallel ProgramsAnthony Bolmarcich, Kimming So, Frederica Darema, V. Alan Norton. 653-662
- An Evaluation of Parallel Procedure CallsRhys S. Francis, Ian D. Mathieson. 663-666
- A System for Investigating Parallel Algorithm and Architecture InteractionBruce P. Lester, Gregory R. Guthrie. 667-670
- On the Performance of Combined Data Flow and Control Flow Systems: Experiments Using Two Iterative AlgorithmsWilliam W. Carlson, José A. B. Fortes. 671-679
- Performance of VLSI Engines for Lattice ComputationsSteven D. Kugelmass, Kenneth Steiglitz, Richard K. Squier. 684-691
- Techniques for Reducing the Complexity of Large System ModelsUmakishore Ramachandran, Marvin H. Solomon, Mary K. Vernon. 692-694
- A Hypecube Algorithm for the 0/1 Knapsack ProblemJong Lee, Sartaj Sahni, Eugene Shragowitz. 699-706
- Implemnting a Dictionary on Hypercube MachinesAmos Omondi, J. Dean Brock. 707-709
- Code Paging on HypercubesDavid A. Poplawski, David O. Rich. 710-712
- All Pairs Shortest Paths on a Hypercube MultiprocessorJing-Fu Jenq, Sartaj Sahni. 713-716
- Parallel Algorithm Design Considerations for Hypercube MultiprocessorsChung-Ta King, Lionel M. Ni, Phillip Prins. 717-720
- Debugging Parallel Fortran on a Shared Memory MachineTodd R. Allen, David A. Padua. 721-727
- Transparent Process Cloning: A Tool for Load Management of Distributed ProgramsArthur P. Goldberg, David R. Jefferson. 728-734
- Belvedere: Prototype of a Pattern Oriented Debugger for Highly Parallel ComputationAlfred Hough, Janice E. Cuny. 735-738
- MPF: A Portable Message Passing Facility for Shared Memory MultiprocessorsDaniel A. Reed, Allen D. Malony, Patrick J. McGuire. 739-741
- Exploiting Locality of Reference in MIMD Parallel Symbolic ComputationYoram Eisenstadter, Gerald Q. Maguire Jr.. 742-744
- Bounds on the Size of Test Sets for Sorting and Related NetworksMoon-Jung Chung, Bala Ravikumar. 745-751
- Testing Permutation Network EquivalenceM. A. Sridhar. 752-754
- A Coding Scheme for Concurrent Error Detection/Correction In Multistage Interconnection NetworksVladimir Cherkassky. 755-758
- Synthesis of Topologies with Minimum Total ExpansionInsup Lee, David Smitley. 759-761
- Cellular Permutation Network Designs with Coset GeneratorsA. Yavuz Oruç, Ajai Thirumalai. 762-764
- Efficient Image Template Matching on Hypercube SIMD ArraysViktor K. Prasanna, Venkatesh Krishnan. 765-771
- Two-Dimensional Convolution on a Pyramid ComputerJik H. Chang, Oscar H. Ibarra, Ting-Chuen Pong, Stephen M. Sohn. 780-782
- A Parallel O(log N) Algorithm for Finding Connected Components In Planar ImagesAjit Agrawal, Lena Nekludova, Willie Lim. 783-786
- Large Scale Unification Using a Mesh-Connected Array of Hardware UnifiersYifong Shih, Keki B. Irani. 787-794
- On Source-To Source Transformation of Sequentlal Logic Programs to And-ParallelismArvind K. Bansal, Leon Sterling. 795-802
- An Overlapping Unification Algorithm and its Hardware ImplementationWen-Tsuen Chen, Kuen-Rong Hseih. 803-805
- Pipelined Evaluation of Conjunctive ProblemsPhillip C.-Y. Sheu. 806-809
- Hypernet Architectures for Parallel ProcessingKai Hwang, Joydeep Ghosh. 810-819
- An Enhancement Scheme for Hypercube Interconnection NetworksWilliam Tsun-Yuk Hsu, Chuan-Qi Zhu, Pen-Chung Yew. 820-823
- Multistage Permutation Network Design with Double Coset GeneratorsA. Yavuz Oruç. 824-827
- Orthogonal Fast Channels: An Enhanced Mesh ArchitectureAhmad M. Jrad, Richard W. Hall. 828-831
- Reasoning About Modular Systolic AlgorithmsS. Purushothaman. 841-843
- Systematic Generation and Enumeration of Systolic Arrays from AlgorithmsNikrouz Faroughi, Michael A. Shanblatt. 844-847
- Determining Biconnectivity on a Systolic ArrayPeter J. Varman, Kshitij Doshi. 848-850
- Load Balancing Protocols on a Local Computer System with a Multiaccess NetworkKatherine M. Baumgartner, Benjamin W. Wah. 851-858
- Mapping with External I/O : A Case StudyDaniel Rose, Francine Berman. 859-862
- Allocation of Real-Time Applications to Distributed SystemsCatherine E. Houstis. 863-866
- Properties of Multiprocessor Scheduling AlgorithmsShau-Ping Lo, Virgil D. Gligor. 867-870
- An Improved Mapping of Data Flow Programs on a VLSI Array of ProcessorsBilha Mendelson, Gabriel M. Silberman. 871-873
- An Architecture for CSP and Its SimulationC. P. Ravikumar, Lalit M. Patnaik. 874-881
- A Reliable Design of Parallel Processor SystemsR. B. Shu, H. C. Du. 882-884
- Graceful Degradation of Multiprocessor SystemsVladimir Cherkassky, Miroslaw Malek. 885-888
- Design and Analysis of a Decentralized Multiple-Bus MultiprocessorQing Yang, Laxmi N. Bhuyan. 889-892
- A Reconfigurable LIW ArchitectureRajiv Gupta, Mary Lou Soffa. 893-900
- Analysis and Design of Parallel Algorithms and Implementations for Some Image Processing OperationsMehrad Yasrebi, James C. Browne, Dharma P. Agrawal. 901-908
- Parallel Image Processing On Enhanced ArraysDionisios I. Reisis, Viktor K. Prasanna. 909-912
- Parallel Pattern ClusterIng on a Multiprocessor with Orthogonally Shared MemoryKai Hwang, Dongseung Kim. 913-916
- A General Purpose VLSI Array for Efficient Signal and Image ProcesssingViktor K. Prasanna, Sarma Sastry. 917-920
- Computing the Two-Dimensional Discrete Fourier Transform on the ASPEN Parallel Computer ArchitectureAllen L. Gorin, Allan J. Silberger, Louis Auslander. 921-923