Chang-Nian Zhang - researchr alias

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Viewing Publication 1 - 18 from 18

2010

A Novel Watermarking Scheme for Blind Objective Image Quality AssessmentWei Dong, Yang Wang 0006, Hua Li, Chang-Nian Zhang. isca, 17(1):25-33, 2010.

2006

A CAM Based Associative Processor Array for Parallel Implementation of AESHua Li, Chang-Nian Zhang, Jianzhou Li. isca, 13(4):176-181, 2006.

A Unified Data Secure and Fault Tolerant Approach for Distributed ComputingChang-Nian Zhang, Leon Pan. isca, 13(2):81-93, 2006.

2005

Low Complexity Programmable Cellular Automata Based Reconfigurable General Modular Mutiplier in GF(2m)Hua Li, Chang-Nian Zhang, Qiang Wang. isca, 12(1):2-8, 2005.

2002

Low-Complexity Versatile Finite Field Multiplier in Normal BasisHua Li, Chang-Nian Zhang. ejasp, 2002(9):954-960, 2002. [doi]

A DSP Based POD Implementation for High Speed Multimedia CommunicationsChang-Nian Zhang, Hua Li, Nuannuan Zhang, Jiesheng Xie. ejasp, 2002(9):975-980, 2002. [doi]

2000

Logic operations based on single neuron rational modelChang-Nian Zhang, Ming Zhao, Meng Wang. tnn, 11(3):739-747, 2000. [doi]

1996

A Generalized Square-Multiply Algorithm and VLSI Array Implementation for RSAChang-Nian Zhang, Meng Wang. pdpta 1996: 1-12

1995

Residue Systolic Implementations for Neural NetworksChang-Nian Zhang, Meng Wang, Chien-Chao Tseng. nca, 3(3):149-156, 1995.

1993

An Efficient Algorithm and Parallel Implementations for Binary and Residue Number SystemsChang-Nian Zhang, Behrooz Shirazi, David Y. Y. Yun. JSC, 15(4):451-462, 1993.

1992

Evaluation of a rational functionAlen George Law, Chang-Nian Zhang, Ali Rezazadeh, Lucas Jódar. na, 3(1):265-271, 1992. [doi]

1991

Mapping Multiple Problem Instances into a Single Systolic Array with Application to Concurrent Error DetectionChang-Nian Zhang, H. D. Cheng. icpp 1991: 668-669

1987

Formal verification of systolic networks using theorem proving techniques (abstract only)David Y. Y. Yun, Y. Yun, Chang-Nian Zhang. acm 1987: 362 [doi]

Parallel Designs for Chinese Remainder ConversionChang-Nian Zhang, Behrooz Shirazi, David Y. Y. Yun. icpp 1987: 557-559

Computing multiple modulo summation (abstract only): a new algorithm, its VLSI designs and applicationsChang-Nian Zhang, Behrooz Shirazi, David Y. Y. Yun. acm 1987: 438 [doi]

1986

A fast carry-free algorithm and hardware design for extended integer GCD computationDavid Y. Y. Yun, Chang-Nian Zhang. issac 1986: 82-84 [doi]

1985

A Programmable Systolic Array for Arithmetic Operations in Galois FieldsDavid Y. Y. Yun, Chang-Nian Zhang. icpp 1985: 742-747

1984

Multi-Dimensional Systolic Networks for Discrete Fourier TransformChang-Nian Zhang, David Y. Y. Yun. isca 1984: 215-222

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