Giulia Beanato, Igor Loi, Giovanni De Micheli, Yusuf Leblebici, Luca Benini. Configurable Low-Latency Interconnect for Multi-core Clusters. In Andreas Burg, Ayse Kivilcim Coskun, Matthew R. Guthaus, Srinivas Katkoori, Ricardo Reis, editors, VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers. Volume 418 of IFIP Advances in Information and Communication Technology, pages 107-124, Springer, 2012. [doi]
@inproceedings{BeanatoLMLB12a,
title = {Configurable Low-Latency Interconnect for Multi-core Clusters},
author = {Giulia Beanato and Igor Loi and Giovanni De Micheli and Yusuf Leblebici and Luca Benini},
year = {2012},
doi = {10.1007/978-3-642-45073-0_6},
url = {http://dx.doi.org/10.1007/978-3-642-45073-0_6},
researchr = {https://researchr.org/publication/BeanatoLMLB12a},
cites = {0},
citedby = {0},
pages = {107-124},
booktitle = {VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers},
editor = {Andreas Burg and Ayse Kivilcim Coskun and Matthew R. Guthaus and Srinivas Katkoori and Ricardo Reis},
volume = {418},
series = {IFIP Advances in Information and Communication Technology},
publisher = {Springer},
isbn = {978-3-642-45072-3},
}