Matthias Beck, Olivier Barondeau, Martin Kaibel, Frank Poehl, Xijiang Lin, Ron Press. Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality. In 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany. pages 56-61, IEEE Computer Society, 2005. [doi]
@inproceedings{BeckBKPLP05,
title = {Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality},
author = {Matthias Beck and Olivier Barondeau and Martin Kaibel and Frank Poehl and Xijiang Lin and Ron Press},
year = {2005},
doi = {10.1109/DATE.2005.199},
url = {http://doi.ieeecomputersociety.org/10.1109/DATE.2005.199},
tags = {testing, logic, design},
researchr = {https://researchr.org/publication/BeckBKPLP05},
cites = {0},
citedby = {0},
pages = {56-61},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany},
publisher = {IEEE Computer Society},
isbn = {0-7695-2288-2},
}