Markus Becker, Knut Heiber, Maurits Ortmanns, Yiannos Manoli. A power optimized decimator architecture for cascaded sigma-delta analog-to-digital converters. In Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2003, Sharjah, United Arab Emirates, December 14-17, 2003. pages 798-801, IEEE, 2003. [doi]
@inproceedings{BeckerHOM03,
title = {A power optimized decimator architecture for cascaded sigma-delta analog-to-digital converters},
author = {Markus Becker and Knut Heiber and Maurits Ortmanns and Yiannos Manoli},
year = {2003},
doi = {10.1109/ICECS.2003.1301907},
url = {http://dx.doi.org/10.1109/ICECS.2003.1301907},
researchr = {https://researchr.org/publication/BeckerHOM03},
cites = {0},
citedby = {0},
pages = {798-801},
booktitle = {Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2003, Sharjah, United Arab Emirates, December 14-17, 2003},
publisher = {IEEE},
isbn = {0-7803-8163-7},
}