Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable Datapath Integration - researchr publication related

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Jürgen Becker, Alexander Thomas, Maik Scheer. Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable Datapath Integration. In Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003. pages 237-242, IEEE Computer Society, 2003. [doi]

The following publications are possibly variants of this publication:

Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor DatapathJürgen Becker, Alexander Thomas, Maik Scheer. vlsi 2006: 263-279 [doi]

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